1. Field of the Invention
The present invention relates to integrated circuit manufacturing, and more particularly to insulated-gate field-effect transistors.
2. Description of Related Art
An insulated-gate field-effect transistor (IGFET), such as a metal-oxide semiconductor field-effect transistor (MOSFET), uses a gate electrode to control an underlying surface channel joining a source and a drain. The channel, drain and source are located in a semiconductor substrate, with the channel being doped oppositely to the drain and source. The gate electrode is separated from the semiconductor substrate by a thin insulating layer (i.e., a gate dielectric layer) such as an oxide. The operation of the IGFET involves application of an input voltage to the gate electrode, which sets up a transverse electric field in the channel in order to modulate the longitudinal conductance of the channel.
Polysilicon (also called polycrystalline silicon, poly-Si or just "poly") thin films have many important uses in IGFET technology. One of the key innovations is the use of heavily doped polysilicon in place of aluminum as the gate electrode. Since polysilicon has the same high melting point as a silicon substrate, typically a blanket polysilicon layer is deposited prior to source and drain formation, and the polysilicon is anisotropically etched to provide the gate electrode. Thereafter, the gate electrode provides an implant mask during the implantation of source and drain regions, and the implanted dopants are driven-in and activated using a high-temperature anneal that would otherwise melt the aluminum. Photolithography is used to create patterns in the photoresist mask that define the gate electrode.
An important parameter in IGFETs is the threshold voltage (V.sub.T), which is the minimum gate voltage required to induce the channel. In general, the positive gate voltage of an N-channel device must be larger than some threshold voltage before a conducting channel is induced, and the negative gate voltage of a P-channel device must be more negative than some threshold voltage to induce the required positive charge (mobile holes) in the channel. There are, however, exceptions to this general rule. For example, depletion-mode devices already have a channel with zero gate voltage, and therefore are normally on. With N-channel depletion-mode devices a negative gate voltage is required to turn the devices off, and with P-channel depletion-mode devices a positive gate voltage is required to turn the devices off.
If the source and body of an IGFET are tied to ground, the threshold voltage can be calculated as follows: EQU V.sub.T =.phi..sub.ms -2.phi..sub.f -Q.sub.tot /C.sub.ox -Q.sub.BO /C.sub.ox -.DELTA.V.sub.T ( 1)
where .phi..sub.ms is the work-function difference between the gate material and the bulk silicon in the channel, .phi..sub.f is the equilibrium electrostatic potential in a semiconductor, Q.sub.tot is the total positive oxide charge per unit area at the interface between the oxide and the bulk silicon, C.sub.ox is the gate oxide capacitance per unit area, Q.sub.BO is the charge stored per unit area in the depletion region, and .DELTA.V.sub.T is a threshold lowering term associated with short-channel effects. Expressions have been established for these various quantities in terms of doping concentrations, physical constants, device structure dimensions, and temperature. For example, the total positive charge Q.sub.tot varies as a function of the dopant concentration in the channel region. Therefore, the threshold voltage depends on the doping concentration in the channel region.
The gate electrode is typically doped by the same ion implantation as are the source and drain. For example, boron is frequently implanted to form the source and drain in a P-channel IGFET, and the boron is also implanted into the gate electrode of the IGFET to create a P-type polysilicon gate electrode. However, because boron is such a "light" atom (i.e., low atomic mass), boron implanted into the polysilicon gate electrode can easily diffuse downward along the grain boundaries of the polysilicon and into the gate oxide, and may diffuse ultimately into the underlying channel region. Such additional boron diffused from the gate electrode into the channel affects the device parameters of the IGFET, especially the threshold voltage.
Considerable effort has been expended in the industry in an attempt to minimize such dopant diffusion from a gate electrode into an underlying channel region. One such method is disclosed by Fang, et al, in a paper entitled "Low-Temperature Furnace-Grown Reoxidized Nitrided Oxide Gate Dielectrics as a Barrier to Boron Penetration," IEEE Electron Device Letters, Vol. 13, No. 4, Apr. 1992, which includes a nitridation of a partially grown gate oxide, followed by an additional oxidation step. Polysilicon is then deposited on the reoxidized nitrided oxide and etched to form gate electrodes. Other similar methods are disclosed by Joshi, et al in a paper entitled "Oxynitride Gate Dielectrics for P+-polysilicon Gate MOS Devices," IEEE Electron Device Letters, Vol. 14, No. 12, Dec. 1993, which compares several similar methods of forming oxynitride gate dielectrics. These and other methods are directed to minimizing or eliminating what is viewed as a unwanted effect.
Ion implantation is frequently used to alter the threshold voltage of an IGFET by adjusting the total positive oxide charge, Q.sub.tot, per unit area at the interface between the oxide and the bulk silicon. Selective ion implantation is also frequently performed to achieve multiple kinds of IGFETs having different threshold voltages. In the usual practice a separate mask is required to isolate the IGFETs to receive the selective threshold-setting ion implantation, as well as a separate ion implantation itself, for each different threshold voltage.